Part Number Hot Search : 
M3803 KTA1040D C4500 HMC374E 2653L F1008 MMBT4403 P5504
Product Description
Full Text Search
 

To Download A3909 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
  description the A3909 is a dual full bridge motor driver, designed for 12 v medium power applications. the outputs are rated for operation through a power supply range of 4 to 18 v, and capable of up to 1 a per phase. paralleling the outputs is possible for higher amperage single dc motor applications. the four inputs (in1 to in4) can control dc motors in forward, reverse, brake, and coast modes, or a bipolar stepper motor in full- and half-step modes. the A3909 is supplied in a 10-pin msop package with exposed thermal pad (suffix ly) and a 10-pin ssop (suffix ln) for wave solder applications. both packages are lead (pb) free with 100% matte-tin leadframe plating. A3909-ds features and benefits ? low r ds(on) outputs ? drives two dc motors or single stepper motor ? low power standby (sleep) mode with zero current drain ? thermal shutdown protection ? parallel operation option for 1.8 a, single dc motor ? overcurrent protection: ? output to supply short ? output to gnd short ? output load short dual full bridge motor driver packages: functional block diagram not to scale A3909 control logic gnd out1 out2 vbb vbb vbb in1 in2 load supply load supply configuration for driving 2 dc motors tsd disable uvlo ocp control logic gnd out3 out4 vbb in3 in pad ly package 4 tsd disable uvlo ocp out1 out2 vbb configuration for parallel operation at 1.8 a out3 out4 gnd 10-pin msop with exposed thermal pad (ly package) 10-pin ssop (ln package)
dual full bridge motor driver A3909 2 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com pin-out diagram absolute maximum ratings* characteristic symbol notes rating unit supply voltage v bb 18 v logic input voltage range v in ?0.3 to 6 v output current i out 1v output voltage v out ?0.3 to v bb + 1 v operating ambient temperature t a g temperature range ?40 to 105 oc maximum junction temperature t j (max) 150 oc storage temperature t stg ?55 to 150 oc terminal list table number name function 1 in1 logic input 2 in2 logic input 3 vbb input supply 4 in3 logic input 5 in4 logic input 6 out4 motor terminal 7 out3 motor terminal 8 gnd ground 9 out2 motor terminal 10 out1 motor terminal ? pad (ly package) exposed thermal pad thermal characteristics may require derating at maximum conditions, see application information characteristic symbol test conditions* value unit package thermal resistance r ja ln package (estimated), on 1-layer pcb with copper limited to pin area 130 oc/w ly package, on 2-layer pcb with 2.260 in. 2 of copper area each side 48 oc/w *additional thermal information available on the allegro website. selection guide part number package packing A3909glnx-t* 10-pin ssop 3000 pieces per 13-in. reel A3909glytr-t 10-pin msop with exposed thermal pad 4000 pieces per 13-in. reel *contact allegro sales for availability of this package option. in1 in2 vbb in3 in4 out1 out2 gnd out3 out4 1 2 3 4 5 10 9 8 7 6 pad (ly package) ln and ly packages
dual full bridge motor driver A3909 3 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com electrical characteristics* valid at t a = 25c; unless otherwise specified characteristic symbol test conditions min. typ. max. unit vbb voltage range v bb 4 ? 18 v vbb supply current i bb ? 4 8 ma standby mode ? <1 10 a total driver on-resistance (sink + source) r ds(on)tot i = 1 a, t j = 25c, v bb = 12 v ? 1.6 2 i = 1 a, t j = 25c, v bb = 4 v ? 2.7 3.5 source driver on-resistance r ds(on)src i = 1 a, t j = 25c, v bb = 12 v ? 1.12 ? sink driver on-resistance r ds(on)snk i = 1 a, t j = 25c, v bb = 12 v ? 0.48 ? input logic low level v il(standby) all inputs low ? ? 0.4 v input logic low level v il ? ? 0.8 v input logic high level v ih 2 ? ? v input hysteresis v hys 100 300 500 mv logic input current i in v in = 5 v (pull down = 50 k ) ? 100 150 a vbb uvlo v bbuvlo v bb rising ? 3.6 3.95 v vbb uvlo hysteresis v bbhys 100 300 500 mv standby timer t stb in1 = in2 = in3 = in4 < v il(standby) ? 1 1.5 ms thermal shutdown temperature t jtsd temperature increasing 150 165 180 c thermal shutdown hysteresis t j recovery = t jtsd ? t j ? 20 ? c *specified limits are tested at a single temperature and assured through operating temperature range by design and characteriza tion.
dual full bridge motor driver A3909 4 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com motor operation truth table stepper motor in1 in2 in3 in4 out1 out2 out3 out4 function 0000offoffoffoff sleep mode sleep mode 1010hlhl step 1 step 1 0010offoffhl? step 2 0110lhhl step 2 step 3 0100lhoffoff? step 4 0101lhlh step 3 step 5 0001offofflh? step 6 1001hllh step 4 step 7 1000hloffoff? step 8 dc motors (dual) in1 or in3 in2 or in4 out1 out2 out3 out4 function 0 0 off off off off high impedance (sleep mode) / coast 1 0 h l h l forward 0 1 l h l h reverse 1 1 l l l l brake dc motor (single, paralleled) in1 or in3 in2 or in4 out1 out2 out3 out4 function 0 0 off off off off high impedance (sleep mode) / coast 1 0 h l h l forward 0 1 l h l h reverse 1 1 l l l l brake dc motor (external pwm) in1 or in3 in2 or in4 out1 out2 out3 out4 function 1 0 h l h l forward 0 0 off off off off fast decay 0 1 l h l h reverse 0 0 off off off off fast decay 1 0 h l h l forward 1 1 l l l l slow decay 0 1 l h l h reverse 1 1 l l l l slow decay note: 0 = logic low with v inx < v in(0) (max), 1 = logic high with v inx > v in(1) (min), h = voltage high, source driver on, l = voltage low, sink driver on
dual full bridge motor driver A3909 5 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com functional description device operation the 3909 is designed to operate two dc motors or a single stepper motor. the outputs are pmos source drivers combined with low r ds(on) dmos sink drivers. protection circuitry includes internal thermal shutdown, protec- tion against shorted loads, and against outputs shorted to gnd or supply. undervoltage lockout prevents damage by keeping the outputs off until the driver has enough voltage to operate nor- mally. a low power standby (sleep) mode is activated when all inputs are low for longer than 1 ms. sleep mode disables all of the cir- cuitry making the ic ideal for battery operated applications. overcurrent protection (ocp) the A3909 is protected against accidental shorts or motor outputs to ground and supply, as well as a shorted load condition. for the source drivers, the current is monitored after the mosfet is turned on. if the current exceeds 1.8 a for longer than 2 s, then a fault condition is asserted. the sink driver utilizes a drain-to- source voltage monitor. if the voltage exceeds 2 v for longer than 2 s, the fault condition is asserted. when a fault occurs, the ic immediately disables both sides of the full bridge where the fault occurred. the full bridge input commands will be ignored for a 2 ms period before being allowed to retry. each channel has independent overcurrent protection. during ocp events, the absolute ratings may be exceeded for a short period of time before the outputs are disabled. thermal shutdown if the die temperature increases to t jtsd , then all outputs are dis- abled until the internal temperature falls below a hysteresis level, t tsdhys , of 20c. internal uvlo is detected on vbb to prevent output drivers from turning on when below the uvlo threshold. in1 in2 out1 out2 2 3 4 t standby 5 6 7 current (1 ? 2) 1) low power standby (sleep) mode (i bb = 0) 2) on, reverse ? 100% d uty cycle 3) on, forward ? 100% duty cycle 4) slow decay pwm 5) fast decay pwm 6) coast 7) low power standby (sleep) mode after t stanby (i bb = 0) dc motor timing diagram
dual full bridge motor driver A3909 6 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com stepper motor timing diagram 1 in1 in2 current (1 ? 2) in3 in4 current (3 ? 4) 2 i i (2/4) (1/3) (1/3) i (2/4) 3 4 1 2 3 4 1 2 3 4 5 6 7 8 1 1 2 5 7 3 4 6 8 half step full step i in1 in2 out1 out2 2 3 4 t standby 5 6 7 current (1 ? 2)
dual full bridge motor driver A3909 7 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com application information configuration for parallel operation with 1.8 a output current capability input output pin structures out4 out A3909 1 out2 in1 1 2 3 4 5 10 9 8 7 6 in2 vbb load system controller supply dc motor in3 pad (ly package) in4 gnd out3 gnd out1 out2 out3 out4 in1 in4 in2 in3 50 k v bb v bb 21v 6.5 v vbb 50 k 21 v ly package board via layout for thermal dissipation ln package board
dual full bridge motor driver A3909 8 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package ln, 10-pin ssop terminal #1 mark area a 1.55 0.20 1.00 bsc 2 1 10 a c c 0.21 0.04 1.05 (ref) 0.25 0.10 0 to 8 4.90 0.20 3.90 0.10 6.00 0.20 4.95 2 1 10 0.65 1.00 2.25 0.45 0.30 1.27 0.40 for reference only; not for tooling use dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown branded face pcb layout reference view reference land pattern layout. all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias near the pin lands can improve thermal dissipation (reference eia/jedec standard jesd51-7) b n = device part number = supplier emblem y = last two digits of year of manufacture w = week of manufacture l = lot number nnnnnnn llll 1 yyww standard branding reference view b branding scale and appearance at supplier discretion
dual full bridge motor driver A3909 9 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com package ly, 10-pin msop with exposed thermal pad terminal #1 mark area a gauge plane seating plane 0.86 0.05 seating plane 0.50 ref 0.25 2 1 10 2 1 10 a b c c 0.53 0.10 0.15 0.05 0.05 0.15 0 to 6 3.00 0.10 3.00 0.10 4.88 0.20 1.73 4.60 1.98 1.98 min 1.73 2 1 10 1 0.30 0.50 1.65 0.27 0.18 for reference only; not for tooling use (reference jedec mo-187ba-t) dimensions in millimeters dimensions exclusive of mold flash, gate burrs, and dambar protrusions exact case and lead configuration at supplier discretion within limits shown b exposed thermal pad (bottom surface) reference land pattern layout (reference ipc7351 sop50p490x110-11m) all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet application process requirements and pcb layout tolerances; when mounting on a multilayer pcb, thermal vias at the exposed thermal pad land can improve thermal dissipation (reference eia/jedec standard jesd51-5)
dual full bridge motor driver A3909 10 allegro microsystems, llc 115 northeast cutoff worcester, massachusetts 01615-0036 u.s.a. 1.508.853.5000; www.allegromicro.com copyright ?2013, allegro microsystems, llc allegro microsystems, llc reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions a s may be required to permit improvements in the per for mance, reliability, or manufacturability of its products. before placing an order, the user is cautioned to verify that the information being relied upon is current. allegro?s products are not to be used in life support devices or systems, if a failure of an allegro product can reasonably be expected to cause the failure of that life support device or system, or to affect the safety or effectiveness of that device or system. the in for ma tion in clud ed herein is believed to be ac cu rate and reliable. how ev er, allegro microsystems, llc assumes n o re spon si bil i ty for its use; nor for any in fringe ment of patents or other rights of third parties which may result from its use. for the latest version of this document, visit our website: www.allegromicro.com


▲Up To Search▲   

 
Price & Availability of A3909

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X